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Senior Staff Engineer, Hardware Systems & Silicon Validation

Marvell Semiconductor, Inc.
paid time off, flex time, 401(k)
United States, California, Irvine
15485 Sand Canyon Avenue (Show on map)
Oct 07, 2025

About Marvell

Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities.

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.

Your Team, Your Impact

Marvell's Alaska-C HSC and Alaska-M Copper PHY Ethernet teams, part of the Multimarket Business Group (MBG), develop and validate high-performance networking hardware, including copper Ethernet PHYs, high-speed retimer transceivers and PCIe Gen 6 SSD Controller. These technologies enable high-density Ethernet switch applications across enterprise, PoE, wireless, and data center environments at speeds up to 400GbE.

The Post-Silicon Validation team supports this effort by creating test platforms and conducting comprehensive validation-functional, electrical, and system-level-alongside firmware and software testing. They also assist in integrating Marvell solutions into customer platforms like Ethernet switches and Wi-Fi APs.

System Validation Engineers play a key role in ensuring Marvell's connectivity products meet rigorous standards for performance and reliability across enterprise, industrial, and cloud data center deployments.

What You Can Expect

  • Developed system-level and silicon-level validation plans for Marvell Alaska-C PAM4 SERDES high-speed line card products and Alaska-M Ethernet copper PHYs
  • Responsible for designing high-speed hardware board platforms to support validation and characterization activities.
  • Conduct post-silicon bring-up, functional validation, and compliance testing. Automate test setups using traffic generators, protocol analyzers, scopes, and environmental chambers. Create detailed validation reports with setup, procedures, and results
  • Collaborate with cross-functional teams to debug and resolve issues, support customer issue resolution and perform RMA and FA.

What We're Looking For

  • Bachelor's degree in Computer Science, Electrical Engineering or related fields and 4-10 years of related professional experience. Master's degree in Computer Science, Electrical Engineering or related fields with 3-5 years of experience.
  • Familiarity with high-speed PCB layout, signal integrity, board assembly, and manufacturing.
  • Proficiency in using lab equipment for high-speed SERDES and Ethernet cu PHY characterization including high-speed oscilloscopes, network analyzers, spectrum analyzers, protocol analyzers, and traffic generators.
  • Extensive knowledge of HSC high-speed retimer SERDES, Copper PHY Ethernet, PCIe Gen 6 SSD Controller products, with practical experience in high-speed SERDES and analog signal testing, debugging, and validation. Experience in high-speed board-level hardware design and system bring-up.
  • Excellent analytical, problem-solving, and communication skills.

Preferred:

  • Working knowledge of high-speed HSC SERDES retimer and Analog ADC/DAC characterization. Experience with Ethernet and Networking is a strong plus.
  • Extensive understanding of physical and protocol layers for high-speed Ethernet Networking interfaces.
  • Familiarity with board design; able to interpret schematics and PCB layouts.
  • Hands-on experience with Python for automation and data analysis.

Expected Base Pay Range (USD)

122,700 - 181,600, $ per annum

The successful candidate's starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.

Additional Compensation and Benefit Elements

At Marvell, we offer a total compensation package with a base, bonus and equity.Health and financial wellbeing are part of the package. That means flexible time off, 401k, plus a year-end shutdown, floating holidays, paid time off to volunteer. Have a question about our benefits packages - health or financial? Ask your recruiter during the interview process.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at TAOps@marvell.com.

Interview Integrity

As part of our commitment to fair and authentic hiring practices, we ask that candidates do not use AI tools (e.g., transcription apps, real-time answer generators like ChatGPT, CoPilot, or note-taking bots) during interviews.

Our interviews are designed to assess your personal experience, thought process, and communication skills in real-time. If a candidate uses such tools during an interview, they will be disqualified from the hiring process.

This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.

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