Systems Design Engineer

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THE ROLE:

The Data Center Platform Engineering Group (DPEG)organization is looking for skilled individuals that can contribute to the bring-up, support and debug of complex system / SOC problems. Individuals will be part of a growing lab team and required to do hands on experiments related to issue management as well board level reworks. The position involves a wide range of activities including deploying pre-production platforms and test stations to enable silicon bring-up and validation, contributing to the triage, debug and rework required to resolve complicated system level issues.

THE PERSON:

The ideal candidate be a team player with strong communication skills and able to work in a dynamic environment.Must be a self-starter capable of working with minimal supervision and driving tasks to completion.

KEY RESPONSIBILITIES:

• Setup hardware to facilitate remote/local test execution and user defined workloads in the DPEG validation lab
• Own initial troubleshooting and debug of a wide variety of system, firmware, or software issues encountered while maintaining the integrity of a large number of development systems.
• Reproduce issues and validate fixes identified by DCGPU platform leads and chief engineers.
• Provide logs and statistics that will help in further debug of issues.
• Integrate automated testing in CI/CD environment (e.g. Jenkins, Ansible)
• Work within a managed ticketing system and communicate clearly on steps/activities

REQUIRED EXPERIENCE:

• Proven test bench setup experience with expertise in embedded systems
• Able to read and interpret board schematics
• Software Programming and scripting experience (Python, bash, C/C++) in Windows and Linux operating systems.
• PC/server environment H/W and S/W setup and administration.
• Basic networking skills
• Comfortable working in different operating system environment including Windows and Linux
• Excellent soldering skills
• Experience with HW and SW fault detection and management
• Experience with power supplies monitoring and sequencing
• Proficient in the fundamentals of power electronics with special emphasis on multiphase power converters
• Demonstrated ability to work with oscilloscopes, multi-meters, current probes, electronic loads, and protocol analyzers as well as adept at intuitive reasoning to explain and correct unexpected results
• Proficient at documenting experimental results in a structured manner for ease of reference
• Knowledge of computer hardware (CPU/APU, graphic cards, memory, bus logic, and display technologies) and software architecture (driver/bios)
• Ability to set up hardware and build computer systems
• Logic based decision making on triage/debug
• Test automation expertise using Perl/Tcl/Python/LabView
• Bonus skills: Familiarity with the low-speed industry standard protocols such as I2C, Redfish, IPMI, SPI, I3C, SVI2, SVI3 and for the high-speed industry standard protocols such as PCIe Gen 5.

ACADEMIC CREDENTIALS:

• Bachelor's Degree in Electrical or Computer Engineering Preferred

LOCATION:

• Austin, TX

This role is not eligible for visa sponsorship.

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Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD's "Responsible AI Policy" is available here.

This posting is for an existing vacancy.