Senior Director of DDR/HBM PHY Architecture

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

As a visionary leader in the field of high-speed interface design, you have a deep understanding of computer architecture, mixed-signal design, off-chip signaling, RTL development, and logical verification. You thrive in a collaborative environment, guiding and mentoring a team of highly skilled engineers. Your extensive experience in managing technical teams enables you to create and execute strategic plans that align with both market needs and technological advancements. You are adept at translating complex technical requirements into clear specifications and are passionate about driving innovation while optimizing performance, power, and area. You possess excellent communication skills, enabling you to effectively interact with internal teams and external customers. Your ability to stay abreast of industry trends and represent Synopsys in standards committees underscores your commitment to maintaining our leadership in the market.

• Create goals, objectives, and job assignments for a highly skilled team of memory PHY architects.
• Understand marketing and customer desires for Synopsys' DDR and HBM PHY interface performance and functionality.
• Guide the team through the product specification process, assisting in generating functional descriptions and creating detailed specifications.
• Regularly review the team's product specifications against product goals to ensure alignment.
• Optimize design for performance, power, and area, ensuring cutting-edge solutions.
• Interact and communicate with design teams performing logical design, logical verification, analog circuit design and verification, and layout design.
• Support customers in the implementation of our products, providing expert guidance and troubleshooting.
• Track industry developments through standards committees, representing Synopsys in these forums.

• Drive the development of next-generation DDR and HBM PHYs, ensuring Synopsys remains at the forefront of memory interface technology.
• Shape the strategic direction of memory PHY product design, aligning with market trends and customer needs.
• Enhance the performance, power efficiency, and area optimization of our memory PHY products.
• Foster a collaborative and innovative team environment, enabling the continuous growth and development of team members.
• Strengthen Synopsys' reputation as a leader in high-speed interface design through active participation in industry standards committees.
• Ensure customer satisfaction by providing top-tier support and solutions, contributing to long-term business relationships.

• Strong experience managing a highly technical team of senior engineers.
• Understanding of high-speed interface principles, such as mixed-signal design and off-chip signaling.
• Proficiency in generating and supporting documentation through written specifications, and communicating those specifications within a design team and to external customers.
• Expertise in RTL logic design, simulation, test planning, and verification of complex integrated circuit components.
• Knowledgeable in design-for-test, timing analysis, power analysis, behavioral modeling, and synthesis constraints.
• Ability to work across a multi-site team to communicate ideas, understand problems, and find solutions to create a leading-edge design.
• Skilled in troubleshooting and debugging mixed-signal interfaces.
• Possesses a minimum of 18 years of related experience.

• Visionary leader with a passion for innovation and technology.
• Exceptional communicator with the ability to convey complex technical concepts to diverse audiences.
• Collaborative team player who fosters a supportive and inclusive work environment.
• Detail-oriented with a strong focus on optimizing performance, power, and area.
• Proactive problem-solver with a knack for troubleshooting and debugging.
• Dedicated to staying current with industry trends and advancements.

You will join a collaborative, multi-person engineering team engaged in the development of DDR and HBM PHYs. This team is responsible for creating the specifications and frameworks for Synopsys' memory PHY products, ensuring that they meet market demands and technological advancements. The team thrives on innovation, collaboration, and a shared commitment to excellence.